This invention relates to phase shift keying modulation and, in particular, to a phase shift keying modulation apparatus, a phase shift keying modulation method, and a phase shift keying modulation program for carrying out conversion of three binary signals by the phase shift keying modulation.
As well known in the art, phase shift keying modulation is used in satellite communication, digital microwave communication, and so on. In general, a 2n-phase shift keying modulation such as a binary phase shift keying modulation, a quadrature phase shift keying modulation, an eight-phase shift keying modulation, and so on is used due to simplicity in a circuit where n represents a positive integer.
In a prior art of the phase shift keying modulation, the 2n-phase shift keying modulation is generally used in the manner which is described, for example, by Yoichi Saito in a book which is published by Denshi-Joho-Tsushin-Gakkai (the Institute of Electronics, Information and Communication Engineers of Japan) (February 1996) and which has a title “Modulation/Demodulation for digital radio communications.” It will be assumed that binary data is transmitted at a bit rate of Rbps (bit per second). When the positive integer n is equal to one, namely, n=1, the binary phase shift keying modulation is used to transmit the binary data using a bandwidth corresponding to R Hz. When the positive integer n is equal to two, namely, n=2, the quadrature phase shift keying modulation is used to transmit the binary data using a bandwidth corresponding to R/2 Hz.
Attention will be directed to a conventional phase shift keying modulation. It will be described in a case where phase shift keying modulation in subjected to a binary digital signal having n bits long or n bit-string. In this event, the phase shift keying modulation is carried out so as to make the binary digital signal correspond to signal points of 2n values.
The above-mentioned prior art has problems as follows.
In the 2n-phase shift keying modulation as the conventional art of the phase shift keying modulation, it in impossible to flexibly set a frequency because an interval between frequencies enable to modulate is widely apart (e.g. 50 megahertz (MHz), 100 MHz, 200 MHz, . . . , and so on).
For example, it will be assumed that an available bandwidth is equal to 80 MHz and the binary phase shift keying modulation and the quadrature phase shift keying modulation require bandwidths of 100 MHz and 200 MHz in connection of necessary transmission capacity. In this event, it is impossible to use the binary phase shift keying modulation because the binary phase shift keying modulation is the bandwidth of 100 MHz. The quadrature phase shift keying modulation is used. However, an available bandwidth remains largely because the quadrature phase shift keying modulation has the bandwidth of 50 Hz.
In addition, the quadrature phase shift keying modulation is advantageous in that transmission power is largely consumed. This is because, comparison with the binary phase shift keying modulation, the quadrature phase shift keying modulation requires the transmission power larger than that of the binary phase shift keying modulation by about 3 dB at a required C/N ratio (carrier-to-noise ratio) to realize an bit error rate equivalent to that of the binary phase shift keying modulation In recent years, demand for effective use of the frequency and of the transmission power becomes larger.
In the manner which is described above, a requirement is made as regards a phase shift keying modulation method intermediate between the quadrature phase shift keying modulation and the binary phase shift keying modulation that has a bandwidth between 100 MHz and 50 MHz and has a consumed power lower than that of the quadrature phase shift keying modulation.
In addition, various preceding arts related to the phase shift keying modulation of the type described are already known. By way of example, Japanese Unexamined Patent Publication of Tokkai No. Hei 4-196945 or JP-A 4-19645 describes “MULTILEVEL MODULATING/DEMODULATING COMMUNICATION METHOD AND SYSTEM” to effectively utilize a frequency by realizing a modulated frequency as a value dividing entire transmission capacity T with a value, which is not a natural number such as 5/2, 7/3 and 7/2 or the like and utilizing an excess band by transmitting information as the combination of plural phase planes. According to JP-A 4-196945, in the case of N=2, M=4, P=1, Q=1, A1=24, and A2=24 of the N number (two) values A1 and A2, a transmitting data train conversion circuit converts a transmitted signal to 9 (M×N+P) trains of transmitting data train. A data conversion circuit converts the transmitting data train to the two pairs (N pairs) respectively having the 5 (M+Q) trains of transmitting parallel data trains. A parallel/serial conversion circuit converts the transmitting parallel data trains to 5 (M+Q) trains of transmitting serial data trains. A multilevel modulation circuit executes 24-value multilevel orthogonal modulation according to the 5 trains of the transmitting serial data trains to produce a modulated signal. From the modulated signal, a received signal is reproduced through a multilevel demodulation circuit, serial/parallel conversion circuit, inverse conversion circuit and data train number inverse conversion circuit. However, JP-A 4-196945 discloses technique well known in the art and merely discloses general structure although it directly relates to this invention.
In addition, Japanese Unexamined Patent Publication of Tokkai No. Hei 4-196946 or JP-A 4-196946 discloses “METHOD AND DEVICE FOR MULTILEVEL ORTHOGONAL AMPLITUDE MODULATION” to facilitate the acquisition of synchronism on the side of a demodulator while preventing the offset of a DC level at a base band signal by changing the arrangement of symbols on a phase plane and transmitting signals by using the combination of signal points rotationally symmetric for each 90 deg. on each phase plane. According to JP-A 4-196946, in the case of P=7 and N=2, a transmitting data train converted to seven data trains is inputted to a data train number and parallel/serial conversion circuit, converted to the two pairs of four parallel transmitting data trains and converted to a pair of four serial transmitting data trains later. A signal point combination change circuit changes the symbol arrangement of inputted signal points and outputs four serial data trains inputted to the modulation circuit. A multilevel modulation circuit executes the multilevel orthogonal amplitude modulation of 12 QAM to the four modulation circuit input serial data trains and outputs a modulated signal.